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Intel Romley Delayed to End of Q1 2012? Chipset, CPU Issues Cited




Next week, Intel is holding its annual developer bash in Moscone Center, San Francisco CA. However, their server partners aren’t too thrilled with the situation that Romley platform – Intel’s next generation Xeon platform based on Socket R (LGA-2011) and B2 (LGA-1356) – won’t be available for shipping until the (late part) first quarter of 2012.

We spoke with several sources in the know, and they confirmed to us that they won’t have Romley-based products in the fourth quarter of 2011, since the next-gen Xeon platform slipped into 2012. This has nothing in relation to the desktop versions Sandy Bridge-E and the X79 Chipset who both are scheduled to launch in fourth quarter of this year, albeit in limited quantity.

The problems are allegedly twofold: the 32nm 8-core Sandy Bridge is not enjoying good yields for now, and the world+dog now know that the decision to embed Serial Attached SCSI (SAS) into the chipset resulted in a world of pain when it comes to getting the chipset working properly, and not having issues by sending random erroneous data. Since SAS is present on three out of four versions of Patsburg chipset (Patsburg-A is the entry version, -B, -D and -T versions are higher-end).

Remember that only few months ago, Intel’s bullet train called Sandy Bridge came to a crushing halt after an error was discovered in the chipset, causing massive delays across all affected platforms. The echos of that delay are taking their toll with Romley, but at least Intel did not launch the platform and got its partners in the hot water.

Knowing Intel’s engineering strength, they will pull through this situation as well, but the company that could profit from this situation is no other than AMD. As you can imagine, Romley launch later in 2012 presents excellent news for AMD, who recently started revenue shipping of their 16-core Opterons based on the Bulldozer architecture. AMD has complete infrastructure in place, having relied on Socket G34 and the mature Maranello platform.

Thus, there should be no SNB-EN/EP to derail AMD’s bulldozing bullet train… for the time being.

Original Author: Theo Valich

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